Application of Vedic Mathematics for fast computation in DSP based Power System Protection and Monitoring

Abstract

The primary objective of a power system is to deliver power continuously despite disturbances. It is crucial that a power system is protected from contingencies. For this purpose, several protection schemes are employed out of which numerical relays embedded with digital signal processors (DSP) are able to improve the protection operations significantly. Such relays are capable of performing large number of complex computations in relatively short time. Real time signals such as voltage and current are converted from analog to digital by the use of ADCs & several operations are performed on the sampled data. One such important operation is the extraction of the fundamental frequency component of the sampled signal from which the orthogonal values are extracted to serve as an indication for the relay tripping system. Several methods exist for this purpose, one among which is the Discrete Fourier Transform (DFT). The DFT can extract any required harmonic and provide the quantities required for the tripping algorithm. However, the DFT is a time intensive process due to the large number of multiplications and additions. This article presents a method of using Vedic mathematical algorithms to perform computations in lesser time, i.e. with a reduced delay.